Karthik Palaniappan

Hey there!

I’m an MS CSE graduate from Georgia Tech with seasoned proficiency in adapting ML paradigms to chip design at Xilinx-AMD (3 patents filed in continual learning of FPGA compile-time estimators, ML-based FPGA compile job-scheduling, and FPGA placement parameter ranking). Most recently at Georgia Tech, my work on “incentivizing neuro-symbolic reasoning in multimodal foundation models” engendered by AlphaGeometry, DeepSeek-R1, etc. has aided the fortification of my perspicacious aptitude for literature review and effectuation of SoTA compute-constrained post-training techniques in MLLMs.

I’m actively seeking job opportunities in applied ML (across roles in search, recommendations, RAG, LLM fine-tuning, LLM eval, data generation, post-training RL, reasoning, tool-use, etc.). Please feel at liberty to reach out to confer further!